Sep 14, 2026 · 26 min · 10 segments
Following Hot Chips 2026, join the TechStack team as we discuss two notable CPU architecture developments from IBM and SiFive. We explore IBM’s new dual-architecture processor for future Z and…
which is a cisc instruction set complex instruction set and then arms instruction set is also supported which is a risk so you have risk and cisc on the same core design jim i know you've been tracking this Enlighten me how the heck this works.
This is amazing because this is the first time we've seen this.
And yeah, and you're right, Dave, because hot chips is like drinking from a fire hose.
And they kicked off the conference with this presentation.
And this is a major announcement.
We've never seen this before.
Supporting two instruction sets.
Basically, what they did was they and this isn't just two processors lumped together.
This will be in their next generation Z processor, which presumably will be late 2027, early 2028 probably.
They didn't name it, but if they go along their current naming structure, it'll be Z18.
It's additions to the hardware and additions to the software.
It's going to be able to do these.
It still is doing it one or the others at a time.
It's not doing them in parallel.
but this is very unique this opens up a lot of opportunities for the z architecture you have to remember that there's never been two architectures in the data center.
interesting stuff so z architecture that's that's the uh the difference here folks that might not be familiar this is ibm's uh proprietary instruction set jim i'm going to go back to you again real quick you mentioned the word mainframe ibm builds servers for different applications than the average cloud server or even an AI server.
It's more of a big data analytics platform, right? I mean, what are we talking about here? I know ARM is sort of maybe the traffic cop cores on the chip or supporting IO, things like that.
What are we talking about for the core application for this beast?
which is a cisc instruction set complex instruction set and then arms instruction set is also supported which is a risk so you have risk and cisc on the same core design jim i know you've been tracking this Enlighten me how the heck this works.
This is amazing because this is the first time we've seen this.
And yeah, and you're right, Dave, because hot chips is like drinking from a fire hose.
And they kicked off the conference with this presentation.
And this is a major announcement.
We've never seen this before.
Supporting two instruction sets.
Basically, what they did was they and this isn't just two processors lumped together.
This will be in their next generation Z processor, which presumably will be late 2027, early 2028 probably.
They didn't name it, but if they go along their current naming structure, it'll be Z18.
It's additions to the hardware and additions to the software.
It's going to be able to do these.
It still is doing it one or the others at a time.
It's not doing them in parallel.
but this is very unique this opens up a lot of opportunities for the z architecture you have to remember that there's never been two architectures in the data center.
interesting stuff so z architecture that's that's the uh the difference here folks that might not be familiar this is ibm's uh proprietary instruction set jim i'm going to go back to you again real quick you mentioned the word mainframe ibm builds servers for different applications than the average cloud server or even an AI server.
It's more of a big data analytics platform, right? I mean, what are we talking about here? I know ARM is sort of maybe the traffic cop cores on the chip or supporting IO, things like that.
What are we talking about for the core application for this beast?
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