Okay, can you tell us anything about what you're doing in that proprietary link that can get that kind of bandwidth and that kind of latency from DDR, from not, I mean, from not HBM?

Yeah, so there are a number of problems that we have to solve here.

And so this interface that we've developed It's not just, say, the physical link, but it has elements at the software level, at the protocol level, at the transistor level, and I.O., and at the physical interface.

So it's this sort of ensemble of technologies that when you put them together, they allow our interface to run at very high speeds.

So it's a system level solution to this problem.

A lot of it I can't get into a lot of detail on, but basically we have compute elements, we have memory aggregators, and they all connect to each other through this link.

with no switches in between, with a single hop.

How do you expect that customers will configure that and use that configurability?

Okay, can you tell us anything about what you're doing in that proprietary link that can get that kind of bandwidth and that kind of latency from DDR, from not, I mean, from not HBM?

Yeah, so there are a number of problems that we have to solve here.

And so this interface that we've developed It's not just, say, the physical link, but it has elements at the software level, at the protocol level, at the transistor level, and I.O., and at the physical interface.

So it's this sort of ensemble of technologies that when you put them together, they allow our interface to run at very high speeds.

So it's a system level solution to this problem.

A lot of it I can't get into a lot of detail on, but basically we have compute elements, we have memory aggregators, and they all connect to each other through this link.

with no switches in between, with a single hop.

How do you expect that customers will configure that and use that configurability?